The Research and Innovation Advisory Group (RIAG) is a component of the EuroHPC JU's Industrial and Scientific Advisory Board, which provides independent advice to the Governing Board on the strategic research and innovation agenda and on the acquisition and operation of the supercomputers owned by the Joint Undertaking. 

The RIAG is composed of  12 members, six of which are appointed by the Private Members (i.e. ETP4HPC, DAIRO/BDVA and QuiC) and the other six  are appointed by the Governing Board. 12 observers are appointed similarly. 

The RIAG draws up and regularly update the draft multiannual strategic research and innovation agenda. This draft multiannual strategic research and innovation agenda identifies research and innovation priorities for the development and adoption of technologies and key competences for High-Performance Computing across different application areas in order to support the development of an integrated High-Performance Computing ecosystem in the EU, strengthen competitiveness and help create new markets and societal applications.


ETP4HPC has three members in the RIAG, as well as four observers. Together they represent the interests of our association in the EuroHPC RIAG. The RIAG is chaired by one of the ETP4HPC representatives, Jean-Philippe Nominé.

Meet our RIAG team!


  Axel Auweter, Megware, member of the ETP4HPC Steering Board.

Axel Auweter joined Megware (a leading European provider and system integrator of energy efficient and HPC solutions) as HPC development manager in June 2016 and acts as CTO since July 2017. In his role, he oversees a team of hardware, firmware and software engineers working on improving Megware’s award-winning ColdCon® liquid cooling technology for energy efficient high performance computing systems. His academic background is in computer architecture, system level programming and operating systems.


Dr Daniele Cesarini, CINECA, member of the ETP4HPC Steering Board.
Daniele Cesarini graduated in Computer Engineering from the University of Bologna (Italy) in 2014, where he also earned his Ph.D. in Electronics, Telecommunications, and Information Technologies Engineering in 2019.
He is currently an HPC Specialist at Cineca High Performance Computing department where he works in the area of performance optimization and evaluation of next-generation HPC architectures to improve the roadmap of CINECA’s HPC infrastructures. His range of expertise include parallel programming model, shared and distributed memory systems, high-performance computer architectures and runtime systems. His research interests also concern the development of SW-HW co-design strategies as well as algorithms for parallel programming support for energy efficient HPC systems. He has also an active role in the energy efficient HPC activities of CINECA where his work is focused to improve the power efficiency of the CINECA's datacenter.


Dr Jean-Philippe Nominé, CEA, member of  the ETP4HPC Steering Board, Chair of the RIAG. 
Jean-Philippe Nominé is HPC Strategic Collaborations Manager at CEA. He was involved in the creation of PRACE and ETP4HPC, and was a member of the ETP4HPC Office from 2012 to 2019.  He joined CEA’s HPC division in 1992 and held different managing positions there, with teams in charge of HPC software development and software engineering, then started working on European collaborations and projects in 2007. In the meantime,  he spent 3 years at CEA Headquarters, between 2017 and 2019, working on digital and HPC strategy. He also taught  High Performance Visualisation and gave various introduction lectures to HPC in different Higher Level Establishments, in Masters curriculae (with ENSTA, Ecole Centrale, ENS Cachan, INSTN…), and was PhD advisor for several students. He is  regularly involved in the promotion of HPC towards the general public and younger people.



Dr Carlo Cavazzoni, Leonardo, member of the ETP4HPC Steering Board.

Carlo Cavazzoni is Head of Computational R&D, and Director of the HPC Lab at Leonardo. He holds a doctoral degree in Material Science from the Scuola Internazionale Superiore di Studi Avanzati di Trieste.  He is author and co-author of many papers published in prestigious international review including Science, Physical Review Letters, Nature Materials, and many others. Before joining Leonardo, he spent 18 years at CINECA, where he was responsible for activities regarding the evolution of supercomputer architectures, programming models and related infrastructures. 


Hugo Falter, ParTec, member of the ETP4HPC Steering Board
Hugo Falter is Co-founder and Chief Operating Officer of the ParTec Cluster Competence Center GmbH, a spin-off from the Computer Science Department of the University of Karlsruhe in 1999. ParTec provides a full range of software, services and support for HPC systems. ParTec develops and supports technology for Modular Supercomputing.

Hugo Falter studied law in Regensburg and Munich. Together with a Munich law firm he specialised in bringing innovative technology companies to market. In the Munich law firm Frohwitter, Hugo Falter is responsible for the firm's subsidiary ParTec Cluster Competence Center GmbH. In 2012 Hugo Falter was the co-founder of ETP4HPC. He is one of the three Board members representing SMEs in ETP4HPC.


Dr Martin Palkovic, ECMWF
Martin Palkovic is Director of Computing at European Centre for Medium-Range Weather Forecasts (ECMWF) since 2018. He is responsible among others also for the BOND programme consisting of build of ECMWF new datacentre in Bologna, installation of 4 HPC complexes with overall performance over 36 PFLOPS and moving the DHS (close to ½ EByte of data) from current datacentre in Reading, UK to Bologna, Italy.

He was born in Bratislava, Slovakia and has M.Sc. degree in Electrical Engineering (processor design) from the Slovak University of Technology, M.Sc. degree in Economics (international trade) from the University of Economics in Bratislava and Ph.D. in Electrical Engineering (compiler optimisations/loop transformations) from Technische Universiteit Eindhoven. He joined imec Leuven, Belgium in 2001, where he has been a researcher from 2001 to 2008 and senior researcher from 2008 to 2012 working on high-level optimizations and parallel platform architectures for low power. From 2012 to 2017 Dr. Palkovic was the director of newly established IT4Innovations, the national supercomputing center in Czech Republic. Under his leadership, the Czech national supercomputing centre was established with #40 system in Top500 and strong international reputation was gained. He undertook also the first steps so that Czech Republic joined EuroHPC at the beginning of 2018. During 2018 he was for a short period the vicepresident of engineering at Codasip, the RISC-V IP company in the Czech Republic. He is author and co-author of more than 50 publications in the embedded system domain and was the general chair of HiPEAC 2016 in Prague and a member of the Horizon 2020 Future and Emerging Technologies Advisory Group. He is the member of ESFRI Strategy Working Group on Data, Computing and Digital Research Infrastructure as well as other advisory bodies (e.g. EPI, Intel EMEA HPC AI Advisory Council).

Pascale Rossé-Laurent, Atos

Pascale Rossé-Laurent is a Senior HPC Software Architect at Atos, and an Atos Distinguished Expert. She has been actively contributing to the ETP4HPC SRA work since its creation, as the System Software group leader. She has a long experience in HPC system software design. She is also involved in new developments for the new technology domains, in particular IA for HPC and hybrid HPC/Quantum Computing. Since 1995, she has developed a strong partnership with the Research communities: advising PhD students, being an active member in several French and International research committees (ANR, INRIA, ROSS …), building and participating to European Research Projects (Datascale, DEEP-SEA, IO-SEA, RED-SEA, EPI, EUPEX…). She holds a Master of Artificial Intelligence (CERICS).

Cookies help us deliver our services. By using our services, you agree to our use of cookies Learn more